Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic systems. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), resistive random access memory (RRAM), double data rate memory (DDR), low power double data rate memory (LPDDR), phase change memory (PCM) and Flash memory. Non-volatile memory is memory that can retain its stored data for some extended period without the application of power. Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices are commonly used in electronic systems, such as personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, cellular telephones, and removable memory modules, and the uses for Flash memory continue to expand.
Flash memory typically utilizes one of two basic architectures known as NOR Flash and NAND Flash. The designation is derived from the logic used to read the devices. Typically, an array of memory cells for NAND flash memory devices is arranged such that memory cells of a string are connected together in series, source to drain.
Electronic systems, such as memory systems, often include one or more types of memory and that memory is typically coupled to one or more communications channels within the memory system. Time varying signals in such systems are utilized to transfer information (e.g., data) over one or more conductors often referred to as signal lines. These signal lines are often bundled together to form a communications bus, such as an address or data bus, for example.
To meet the demands for higher performance operating characteristics, designers continue to strive for increasing operating speeds to transfer data across these communications buses within these system. However, one issue with increased data transfer rates is maintaining signal integrity during these bursts of data on the various bus signal lines of the memory system. As these transfer rates increase, the impedance characteristics of a data bus become more pronounced. Capacitive and inductive characteristics of the signal lines may begin to distort the signal waveforms on the data bus at these higher data rates. Waveforms may begin to spread out and/or reflections may occur at locations of unmatched impedance on the data bus signal lines, for example. Signal integrity (e.g., data integrity) can be affected when an impedance (e.g., output impedance) of one or more nodes of a memory device coupled to a communication bus is not properly matched to the impedance of the communications bus. Impedance mismatch might result from process variations, temperature variations and voltage (e.g., power supply potential) variations in a memory device, for example. Thus, it is typically desirable to reduce these effects in order to reduce the likelihood of data corruption as data is transmitted on a bus, for example.
For the reasons stated above, and for other reasons which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for methods of impedance adjustment operations in memory devices, such as in memory devices comprising an electronic system.